摘要 :
Multi-wire sawing using loose Silicon Carbide (SiC) abrasives powder is still the main technology for the wafering of multicrystalline silicon nowadays. To control the quality of SiC powder is of great importance to the wafering i...
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Multi-wire sawing using loose Silicon Carbide (SiC) abrasives powder is still the main technology for the wafering of multicrystalline silicon nowadays. To control the quality of SiC powder is of great importance to the wafering industry that employing this process. A number of investigations had been published to analysis and model the behavior of SiC in the wiresaw process. However, there is still a lack of quantitative relation of the SiC inspection data to the wiresaw yield. There is no SiC incoming inspection criterion has been reported to have a consistent relation with the yield data to the authors' knowledge. A model was proposed in this study to correlate the shape measurement data from the SYSMEX FPIA 3000 to the yield of wiresaw process. The model is based on a series of assumptions that relate the silicon material removal mechanisms to a state-of-the-art particle shape analysis method. More than SO thousand plant wiresaw data were gathered to tune and verify the model. The model was found to be able to set a consistent incoming inspection specification for the SiC abrasive particles. At the same time, the model can be used as a tool for optimizing the wiresaw process.
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Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been...
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Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been optimized for mono and multicrystalline (mc-Si) substrates with resistivity in the range of 0.9-1.5 ohm.cm. In mc-Si substrates, micrometer sized macropores are isotropically formed under white light illumination, i.e. irrespective to the surface orientation, leading to an overall effective reflectivity as low as 8.5 % (AM1.5 standard solar illumination, 400-1000 nm). Compared to a flat surface, the Si surface properties are not modified but due to the higher area the surface recombination velocity of a PEC textured surface increases by a factor of 2-3.
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摘要 :
Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been...
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Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been optimized for mono and multicrystalline (mc-Si) substrates with resistivity in the range of 0.9-1.5 ohm.cm. In mc-Si substrates, micrometer sized macropores are isotropically formed under white light illumination, i.e. irrespective to the surface orientation, leading to an overall effective reflectivity as low as 8.5% (AM1.5 standard solar illumination, 400-1000 nm). Compared to a flat surface, the Si surface properties are not modified but due to the higher area the surface recombination velocity of a PEC textured surface increases by a factor of 2-3.
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摘要 :
Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been...
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Taking advantage of the electrochemical formation of macropores in aqueous HF under illumination, we have developed an efficient photo-electrochemical (PEC) texturization of n-type crystalline Si wafers. The PEC treatment has been optimized for mono and multicrystalline (mc-Si) substrates with resistivity in the range of 0.9-1.5 ohm.cm. In mc-Si substrates, micrometer sized macropores are isotropically formed under white light illumination, i.e. irrespective to the surface orientation, leading to an overall effective reflectivity as low as 8.5 % (AM1.5 standard solar illumination, 400-1000 nm). Compared to a flat surface, the Si surface properties are not modified but due to the higher area the surface recombination velocity of a PEC textured surface increases by a factor of 2-3.
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The possibility of recycling the silicon kerf produced during silicon wafering with diamond coated wire represents a major advantage of this wafering technology over the slurry based one. A silicon kerf reclaiming process aimed at...
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The possibility of recycling the silicon kerf produced during silicon wafering with diamond coated wire represents a major advantage of this wafering technology over the slurry based one. A silicon kerf reclaiming process aimed at the re-utilization of an internal silicon source meeting photovoltaic quality levels is presented. The silicon kerf recycling technology is characterized by a high silicon recovery yield thanks to a patented silicon kerf collection system which minimizes silicon losses in the refining steps and allows the on-site recycling of solid-free coolant. The regeneration of the silicon kerf consists of several chemical etching steps able to reduce total metal contaminants to less than 3 ppm by mass, yielding a final metal purity in the 6N range. Ongoing investigations are focused on reducing the carbon contamination deriving from diamond particles lost from the wire. Finally, results of the densification of the refined silicon powder into compacted bricks with a density of 1.6 gr/cm~3 are presented.
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摘要 :
The possibility of recycling the silicon kerf produced during silicon wafering with diamond coated wire represents a major advantage of this wafering technology over the slurry based one. A silicon kerf reclaiming process aimed at...
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The possibility of recycling the silicon kerf produced during silicon wafering with diamond coated wire represents a major advantage of this wafering technology over the slurry based one. A silicon kerf reclaiming process aimed at the re-utilization of an internal silicon source meeting photovoltaic quality levels is presented. The silicon kerf recycling technology is characterized by a high silicon recovery yield thanks to a patented silicon kerf collection system which minimizes silicon losses in the refining steps and allows the on-site recycling of solid-free coolant. The regeneration of the silicon kerf consists of several chemical etching steps able to reduce total metal contaminants to less than 3 ppm by mass, yielding a final metal purity in the 6N range. Ongoing investigations are focused on reducing the carbon contamination deriving from diamond particles lost from the wire. Finally, results of the densification of the refined silicon powder into compacted bricks with a density of 1.6 gr/cm~3 are presented.
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The purpose of this paper is to provide a preview of the conceptual changes being considered by the CIGRE/CIRED Joint Working Group C4.40 for the IEC Technical Report series 61000-3-X which focuses on limit allocation procedures f...
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The purpose of this paper is to provide a preview of the conceptual changes being considered by the CIGRE/CIRED Joint Working Group C4.40 for the IEC Technical Report series 61000-3-X which focuses on limit allocation procedures for power quality disturbances. At the time of this writing, there are four significant conceptual changes under consideration related to (1) differences in MV and HV/EHV allocation procedures, (2) the inclusion of energy producing installations, (3) allocation of remaining disturbance levels, and (4) allocation based on maximum network absorption capability. Each of these changes has been vetted by the members of the Joint Working Group and this paper is intended to provide the information to the broader international community.
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摘要 :
The purpose of this paper is to provide a preview of the conceptual changes being considered by the CIGRE/CIRED Joint Working Group C4.40 for the IEC Technical Report series 61000-3-X which focuses on limit allocation procedures f...
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The purpose of this paper is to provide a preview of the conceptual changes being considered by the CIGRE/CIRED Joint Working Group C4.40 for the IEC Technical Report series 61000-3-X which focuses on limit allocation procedures for power quality disturbances. At the time of this writing, there are four significant conceptual changes under consideration related to (1) differences in MV and HV/EHV allocation procedures, (2) the inclusion of energy producing installations, (3) allocation of remaining disturbance levels, and (4) allocation based on maximum network absorption capability. Each of these changes has been vetted by the members of the Joint Working Group and this paper is intended to provide the information to the broader international community.
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The use of inert gas atomization to obtain chemical grade silicon particles was investigated. Both cooling rate and chemical composition are very important regarding a tailored microstructure, related with silicon performance duri...
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The use of inert gas atomization to obtain chemical grade silicon particles was investigated. Both cooling rate and chemical composition are very important regarding a tailored microstructure, related with silicon performance during the synthesis of the silanos, an intermediary law material in the silicone production. Previously refined silicon was used as raw material. Silicon with different aluminum contents were atomized and analyzed. The atomization temperature was set around 1520 deg C, and it was used a confined atomization nozzle. It was necessary to use a long atomization chamber to allow the cooling of the coarse silicon particles. After atomization, the powder was characterized and classified. The coarse fraction was milled. Two different particle size groups (different cooling rates) and the atomized particles were investigated. The chemical behavior during the synthesis of the silanos was analyzed in a laboratory reactor. The relationship between cooling rate, aluminum content and silicon performance during the silanos synthesis is discussed.
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Macro and meso-porous silicon (PSi) samples were prepared by electrochemical anodisation of p~- and p~(++) doped silicon wafers in hydrofluoric acid (HF) based electrolyte under galvanostatic conditions. Anodisation time and curre...
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Macro and meso-porous silicon (PSi) samples were prepared by electrochemical anodisation of p~- and p~(++) doped silicon wafers in hydrofluoric acid (HF) based electrolyte under galvanostatic conditions. Anodisation time and current were varied in order to obtain different PSi morphologies. Samples were characterized by scanning electron microscopy (SEM), photoluminescence (PL) spectroscopy and Raman spectroscopy. Samples prepared on p~- type substrates were macro-porous, showed visible photoluminescence and no observable phonon confinement in Raman spectrum. Porous silicon prepared on p~(++) type substrates was mesoporous, showed no observable photoluminescence and intense phonon confinement was observed in their Raman spectra. Silicon nanocrystal dimensions in PSi samples obtained from photoluminescence and phonon confinement models were correlated with silicon electrochemical dissolution valence n_d. A surface morphology instability is identified in case where electrolyte is more conductive than the silicon substrate.
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