摘要 :
A digital clock frequency multiplier, divisor using floating point arithmetic which generates the output clock with almost zero frequency error has been presented. The circuit has an unbounded multiplication and division factor ra...
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A digital clock frequency multiplier, divisor using floating point arithmetic which generates the output clock with almost zero frequency error has been presented. The circuit has an unbounded multiplication and division factor range and low lock time. A low power mechanism has been incorporated to ensure that the overall power consumption of the circuit is less. The circuit has been designed in TSMC 65nm CMOS process for an input reference time of 0.01ns and has been verified with random multiplication factor values.
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摘要 :
A digital clock frequency multiplier, divisor using floating point arithmetic which generates the output clock with almost zero frequency error has been presented. The circuit has an unbounded multiplication and division factor ra...
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A digital clock frequency multiplier, divisor using floating point arithmetic which generates the output clock with almost zero frequency error has been presented. The circuit has an unbounded multiplication and division factor range and low lock time. A low power mechanism has been incorporated to ensure that the overall power consumption of the circuit is less. The circuit has been designed in TSMC 65nm CMOS process for an input reference time of 0.01ns and has been verified with random multiplication factor values.
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摘要 :
The ESA mission "Space Optical Clock" project aims at operating an optical lattice clock on the ISS in approximately 2023. The scientific goals of the mission are to perform tests of fundamental physics, to enable space-assisted r...
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The ESA mission "Space Optical Clock" project aims at operating an optical lattice clock on the ISS in approximately 2023. The scientific goals of the mission are to perform tests of fundamental physics, to enable space-assisted relativistic geodesy and to intercompare optical clocks on the ground using microwave and optical links. The performance goal of the space clock is less than 1 × 10~(-17) uncertainty and 1 × 10~(-15) τ~(-1/2) instability. Within an EU-FP7-funded project, a strontium optical lattice clock demonstrator has been developed. Goal performances are instability below 1 × 10~(-15)τ~(-1/2) and fractional inaccuracy 5 × 10~(-17). For the design of the clock, techniques and approaches suitable for later space application are used, such as modular design, diode lasers, low power consumption subunits, and compact dimensions. The Sr clock apparatus is fully operational, and the clock transition in ~(88)Sr was observed with linewidth as small as 9 Hz.
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摘要 :
The ESA mission "Space Optical Clock" project aims at operating an optical lattice clock on the ISS in approximately 2023. The scientific goals of the mission are to perform tests of fundamental physics, to enable space-assisted r...
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The ESA mission "Space Optical Clock" project aims at operating an optical lattice clock on the ISS in approximately 2023. The scientific goals of the mission are to perform tests of fundamental physics, to enable space-assisted relativistic geodesy and to intercompare optical clocks on the ground using microwave and optical links. The performance goal of the space clock is less than 1×10~(-17) uncertainty and 1 × 10~(-15) τ~(-1/2) instability. Within an EU-FP7-funded project, a strontium optical lattice clock demonstrator has been developed. Goal performances are instability below 1 × 10~(-15)τ~(1/2) and fractional inaccuracy 5 × 10~(-17). For the design of the clock, techniques and approaches suitable for later space application are used, such as modular design, diode lasers, low power consumption subunits, and compact dimensions. The Sr clock apparatus is fully operational, and the clock transition in ~(88)Sr was observed with linewidth as small as 9 Hz.
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We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ～1-2×10~(-13) at 1 second, ...
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We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ～1-2×10~(-13) at 1 second, averaging to 10~(-15) at 1 day. This development shows that H-maser quality stabilities can be produced in a small clock package, comparable in size to an ultra-stable quartz oscillator required for holding 1-2×10~(-13) at 1 second. This performance was obtained in a sealed vacuum configuration where only a getter pump was used to maintain vacuum. The vacuum tube containing the traps has now been under sealed vacuum conditions for nearly two years with no measurable degradation of ion trapping lifetimes or clock short-term performance. We have fabricated the vacuum tube, ion trap and UV windows from materials that will allow a ～ 400℃ tube bake-out to prepare for tube seal-off. This approach to the vacuum follows the methods used in flight vacuum tube electronics, such as flight TWTA's where tube operation lifetime and shelf life of up to 15 years is achieved. We use neon as a buffer gas with 2-3 times less pressure induced frequency pulling than helium and, being heavier, negligible diffusion losses will occur over the operation lifetime.
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摘要 :
We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ～1-2×10~(-13) at 1 second, ...
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We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ～1-2×10~(-13) at 1 second, averaging to 10~(-15) at 1 day. This development shows that H-maser quality stabilities can be produced in a small clock package, comparable in size to an ultra-stable quartz oscillator required for holding 1-2×10~(-13) at 1 second. This performance was obtained in a sealed vacuum configuration where only a getter pump was used to maintain vacuum. The vacuum tube containing the traps has now been under sealed vacuum conditions for nearly two years with no measurable degradation of ion trapping lifetimes or clock short-term performance. We have fabricated the vacuum tube, ion trap and UV windows from materials that will allow a ～ 400℃ tube bake-out to prepare for tube seal-off. This approach to the vacuum follows the methods used in flight vacuum tube electronics, such as flight TWTA's where tube operation lifetime and shelf life of up to 15 years is achieved. We use neon as a buffer gas with 2-3 times less pressure induced frequency pulling than helium and, being heavier, negligible diffusion losses will occur over the operation lifetime.
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摘要 :
We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ~1-2x10-13 at 1 second, avera...
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We have recently completed a breadboard ion-clock physics package based on Hg ions shuttled between a quadrupole and a 16-pole rf trap. With this architecture we have demonstrated short-term stability ~1-2x10-13 at 1 second, averaging to 10-15 at 1 day. This development shows that H-maser quality stabilities can be produced in a small clock package, comparable in size to an ultra-stable quartz oscillator required for holding 1-2x10-13 at 1 second. This performance was obtained in a sealed vacuum configuration where only a getter pump was used to maintain vacuum. The vacuum tube containing the traps has now been under sealed vacuum conditions for nearly two years with no measurable degradation of ion trapping lifetimes or clock short-term performance. We have fabricated the vacuum tube, ion trap and UV windows from materials that will allow a ~ 400°C tube bake-out to prepare for tube seal-off. This approach to the vacuum follows the methods used in flight vacuum tube electronics, such as flight TWTA's where tube operation lifetime and shelf life of up to 15 years is achieved. We use neon as a buffer gas with 2-3 times less pressure induced frequency pulling than helium and, being heavier, negligible diffusion losses will occur over the operation lifetime.
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摘要 :
Multi matrix is extended concept of the matrix clock. The concept of multi matrix clock is used in the distributed computing environment, when multicore processor systems are used in the distributed system. Multi matrix clock give...
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Multi matrix is extended concept of the matrix clock. The concept of multi matrix clock is used in the distributed computing environment, when multicore processor systems are used in the distributed system. Multi matrix clock gives information of own process event as well as information about other processes which are running concurrently. Multi matrix clock synchronization algorithm is based on exchanging clock information among the nodes and tries to eliminate the effects of non-determinism in the message delay and data processing time. Multi matrix clock may contain many matrices at single events. And these matrices always follow the matrix clock synchronization rule. Multi matrix can be used in the check pointing as well as garbage collection.
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摘要 :
Multi matrix is extended concept of the matrix clock. The concept of multi matrix clock is used in the distributed computing environment, when multicore processor systems are used in the distributed system. Multi matrix clock give...
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Multi matrix is extended concept of the matrix clock. The concept of multi matrix clock is used in the distributed computing environment, when multicore processor systems are used in the distributed system. Multi matrix clock gives information of own process event as well as information about other processes which are running concurrently. Multi matrix clock synchronization algorithm is based on exchanging clock information among the nodes and tries to eliminate the effects of non-determinism in the message delay and data processing time. Multi matrix clock may contain many matrices at single events. And these matrices always follow the matrix clock synchronization rule. Multi matrix can be used in the check pointing as well as garbage collection.
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Clock jitter can cause degradation in the system performance. New and efficient clock jitter analysis methodology is presented in this paper. Odd-number clock divider as well as even-number clock divider can be automatically taken...
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Clock jitter can cause degradation in the system performance. New and efficient clock jitter analysis methodology is presented in this paper. Odd-number clock divider as well as even-number clock divider can be automatically taken into consideration during clock jitter analysis. Furthermore, worst case clock jitter analysis is possible since the state dependency is also considered. This methodology has been compared with the measured data of silicon. Even though monitoring points of simulation and measurement are different, the accuracy of simulation is within 20% compared to the measurement data.
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