摘要 :
Recently, brain-inspired hyperdimensional computing (HDC) becomes an emerging computational scheme that has achieved success in various domains, such as human activity recognition, voice recognition, and bio-medical signal classif...
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Recently, brain-inspired hyperdimensional computing (HDC) becomes an emerging computational scheme that has achieved success in various domains, such as human activity recognition, voice recognition, and bio-medical signal classification. HDC mimics the brain cognition and leverages high-dimensional vectors (e.g., 10 000 dimensions) with fully distributed holographic representation and (pseudo-)randomness. Ensemble learning is a classical learning method utilizing a group of weak learners to form a strong learner, which aims to increase the accuracy of the model. This letter presents a systematic effort in exploring ensemble learning in the context of HDC and proposes an ensemble HDC model referred to as EnHDC . EnHDC uses a majority voting-based mechanism to synergistically integrate the prediction outcomes of multiple base HDC classifiers. To enhance the diversity of base classifiers, we vary the encoding mechanisms, dimensions, and data width settings among base classifiers. By applying EnHDC on a wide range of applications, results show that EnHDC can achieve on average 3.2% accuracy improvement over a single HDC classifier. Further, we show that EnHDC with reduced dimensionality can achieve similar or even surpass the accuracy of baseline HDC with higher dimensionality. This leads to a 20% reduction of storage requirement of the HDC model, which can enhance the efficiency of HDC enabled on low-power computing platforms.
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摘要 :Ring learning-with-errors (RLWE)-based encryption scheme is a lattice-based cryptographic algorithm that constitutes one of the most promising candidates for Post-Quantum Cryptography (PQC) standardization due to its efficient imp...
展开Ring learning-with-errors (RLWE)-based encryption scheme is a lattice-based cryptographic algorithm that constitutes one of the most promising candidates for Post-Quantum Cryptography (PQC) standardization due to its efficient implementation and low computational complexity. Binary Ring-LWE (BRLWE) is a new optimized variant of RLWE, which achieves smaller computational complexity and higher efficient hardware implementations. In this paper, two efficient architectures based on Linear-Feedback Shift Register (LFSR) for the arithmetic used in Inverted Binary Ring-LWE (InvBRLWE)-based encryption scheme are presented, namely the operation of $A\cdot B+C$ over the polynomial ring $\mathbb {Z}_{q}/(x^{n}+1)$ . The first architecture optimizes the resource usage for major computation and has a novel input processing setup to speed up the overall processing latency with minimized input loading cycles. The second architecture deploys an innovative serial-in serial-out processing format to reduce the involved area usage further yet maintains a regular input loading time-complexity. Experimental results show that the architectures presented here improve the complexities obtained by competing schemes found in the literature, e.g., involving 71.23% less area-delay product than recent designs. Both architectures are highly efficient in terms of area-time complexities and can be extended for deploying in different lightweight application environments.
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摘要 :
This research analyzes the performance and provides an initial estimation of the health of Lithium-ion (Li-ion) batteries in frequency regulation applications. Frequency regulation applications appear to produce a great strain on ...
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This research analyzes the performance and provides an initial estimation of the health of Lithium-ion (Li-ion) batteries in frequency regulation applications. Frequency regulation applications appear to produce a great strain on batteries as they are constantly cycled as a fast-ramping resource to regulate the frequency in the grid. The frequency regulation battery profile was extracted from data available only from the Pennsylvania-New Jersey-Maryland Interconnection (PJM). Once the battery profile was established, a Li-ion battery was cycled at 25 ℃ and 40 ℃ for a duration of 1500 and 4271 partial cycles. The aim was to analyze and compare the performance at 25 ℃ and 40 ℃, and potentially identify the trends that show battery aging and capacity fade. To that end, different methods including capacity tests, throughput, and equivalent full-cycle analysis were performed. Electrochemical Impedance Spectroscopy (EIS) tests were done every 100 or 200 partial cycles to analyze the health and aging of the battery. An Equivalent Circuit Model (ECM) was also developed from EIS test results. One of the objectives was to study how the model parameters changed with the number of cycles and start to identify the main degradation mechanisms associated with the battery operation under frequency regulation. The results of cycling testing and a discussion of the analysis are presented here.
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摘要 :
A deep autoencoder (DAE)-based structure for end-to-end communication over the two-user Z-interference channel (ZIC) with finite-alphabet inputs is designed in this paper. The proposed structure jointly optimizes the two encoder/d...
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A deep autoencoder (DAE)-based structure for end-to-end communication over the two-user Z-interference channel (ZIC) with finite-alphabet inputs is designed in this paper. The proposed structure jointly optimizes the two encoder/decoder pairs and generates interference-aware constellations that dynamically adapt their shape based on interference intensity to minimize the bit error rate (BER). An in-phase/quadrature-phase (I/Q) power allocation layer is introduced in the DAE to guarantee an average power constraint and enable the architecture to generate constellations with nonuniform shapes. This brings further gain compared to standard uniform constellations such as quadrature amplitude modulation. The proposed structure is then extended to work with imperfect channel state information (CSI). The CSI imperfection due to both the estimation and quantization errors are examined. The performance of the DAE-ZIC is compared with two baseline methods, i.e., standard and rotated constellations. The proposed structure significantly enhances the performance of the ZIC both for the perfect and imperfect CSI. Simulation results show that the improvement is achieved in all interference regimes (weak, moderate, and strong) and consistently increases with the signal-to-noise ratio (SNR). For instance, more than an order of magnitude BER reduction is obtained with respect to the most competitive conventional method at weak interference when
$\rm SNR 15 dB$
and two bits per symbol are transmitted. The improvements reach about two orders of magnitude when quantization error exists, indicating that the DAE-ZIC is more robust to the interference compared to the conventional methods.
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摘要 :
The growing reliance on intellectual properties exposes systems on chip (SoCs) to many security vulnerabilities and is raising more and more concerns. At the same time, with the quick increase in chip density and deep scaling of f...
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The growing reliance on intellectual properties exposes systems on chip (SoCs) to many security vulnerabilities and is raising more and more concerns. At the same time, with the quick increase in chip density and deep scaling of feature size, current billion-transistor chip designs introduce more challenges to manufacturing fault-free chips. In this paper, we propose an integrated run-time solution for both security and fault tolerance of field-programmable gate arrays (FPGA)-based SoCs through digital signatures, live monitoring, adaptive routing, and partial reconfiguration supported by an in-house-developed network on chip, X-Network. Our X-Network reduces the ratio of required routers versus processing elements with better performance, and more importantly, offers more flexibility than conventional networks to facilitate fault tolerance and security designs. A multiplexed Montgomery modular multiplication architecture is used to increase the speed of the Rivest-Shamir-Adleman algorithm. The design has been implemented and tested on a Xilinx Virtex-6 FPGA development board. Experimental results show that even if up to 20% of the links in the network are faulty, our reconfigurable architecture and algorithm manage to route packets around such faults, and deliver them to their destinations in a relatively low latency. Unlike conventional fault-tolerant methods that usually require resource redundancy, our design does not incur significant area or speed degradation. The resource overhead for both security and fault-tolerant features is around 10% more lookup tables.
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摘要 :
In this work, we bring together object tracking and digital watermarking to solve the spatio-temporal object adjacency problem in image sequences. Spatio-temporal relationships are established by embedding objects with unique digi...
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In this work, we bring together object tracking and digital watermarking to solve the spatio-temporal object adjacency problem in image sequences. Spatio-temporal relationships are established by embedding objects with unique digital watermarks and then by propagating the watermark frame by frame. Watermark propagation is accomplished by an existing object tracking module so that a tracked object acquires its watermark from the correspondences established by the object tracker. The spatio-temporally marked image sequences can then be searched to establish spatial and temporal adjacency among objects without using traditional spatio-temporal graphs. Borrowing from graph theory, we construct binary adjacency matrices among tracked objects and develop interpretation rules to establish a track history for each object. Track history can be used to determine the arrival of new objects in frames or the changing of spatial and temporal positions of objects with respect to each other as they move through time and space.
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摘要 :
Digital modulation and precoding are two key modules for increasing the data rate and reducing the symbol error rate in multiple-input multiple-output (MIMO) systems. Traditionally, these two modules are designed separately, and r...
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Digital modulation and precoding are two key modules for increasing the data rate and reducing the symbol error rate in multiple-input multiple-output (MIMO) systems. Traditionally, these two modules are designed separately, and regular constellations like
${M}$
-ary phase-shift keying (
${M}$
-PSK) and quadrature amplitude modulation (QAM) are used for modulation. However, significant gains can be achieved if modulation and precoding are designed jointly for all antennas. Motivated by this, a multi-dimensional joint constellation and precoding design is proposed to optimize the in-phase and quadrature components for all sub-channels of a MIMO channel at once. The objective is to maximize the minimum distance among the symbols. Extensive simulation results indicate that this approach can significantly improve the performance of the state-of-the-art solutions by reducing the symbol error rate and bit error rate.
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摘要 :
In this letter, we propose deploying the intelligent reflecting surface (IRS) to enhance the physical layer security in non-orthogonal multiple access (NOMA). The secrecy sum-rate of IRS-assisted multiple-input multiple-output (MI...
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In this letter, we propose deploying the intelligent reflecting surface (IRS) to enhance the physical layer security in non-orthogonal multiple access (NOMA). The secrecy sum-rate of IRS-assisted multiple-input multiple-output (MIMO) NOMA is maximized in the presence of an eavesdropper. Because of the discrete unit-modulus constraint and the nonconvex property, the secrecy sum-rate maximization problem is hard to solve. We reformulate the original problem into an equivalent parameterized optimization using rotation matrices and apply the particle swarm algorithm for global optimization. Simulation results verify that the performance of the proposed algorithm is close to the secrecy capacity of the channel, realized by exhaustive search, and outperforms other methods like alternating optimization and zero-forcing in terms of complexity and achievable rates.
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摘要 :
Range-Doppler estimation algorithms that use the phase of the returned signal face the 2
$\pi$
phase ambiguity problem. In this letter, we eliminate phase wrapping by using two coincident opposite polarity chirps but equal startin...
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Range-Doppler estimation algorithms that use the phase of the returned signal face the 2
$\pi$
phase ambiguity problem. In this letter, we eliminate phase wrapping by using two coincident opposite polarity chirps but equal starting frequencies. The returns for both chirps from the same target have near equal phases. The phase wrap is present in both returns but they are the same. Therefore, the differential phase matching used to pair the returns from the same target cancels out the phase wrap. No phase unwrapping is needed. The proposed method has no inherent maximum unambiguous range or velocity, works in multitarget theaters, requires a much lower sampling rate, is not affected by range migration, decouples the Doppler cycle from the pulse repetition frequency and is computationally more efficient than FFT-based methods.
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摘要 :
A novel signaling design for secure transmission over two-user multiple-input multiple-output non-orthogonal multiple access channel using deep neural networks (DNNs) is proposed. The goal of the DNN is to form the covariance matr...
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A novel signaling design for secure transmission over two-user multiple-input multiple-output non-orthogonal multiple access channel using deep neural networks (DNNs) is proposed. The goal of the DNN is to form the covariance matrix of users’ signals such that the message of each user is transmitted reliably while being confidential from its counterpart. The proposed DNN linearly precodes each user’s signal before superimposing them and achieves near-optimal performance with significantly lower run time. Simulation results show that the proposed models reach about 98% of the secrecy capacity rates. The spectral efficiency of the DNN precoder is much higher than that of existing analytical linear precoders,–e.g., generalized singular value decomposition–and its on-the-fly complexity is several times less than the existing iterative methods.
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