摘要 : A universal-Vdd 32-KB four-way-set-associative embedded cache has been developed. The test cache chip was fabricated by using 0.18-Mm enhanced CMOS technology, and it was found to continuously operate from 0.65 V to 2.0 V. Its ope... 展开 A universal-Vdd 32-KB four-way-set-associative embedded cache has been developed. The test cache chip was fabricated by using 0.18-Mm enhanced CMOS technology, and it was found to continuously operate from 0.65 V to 2.0 V. Its operating frequency and power are from 120MHz and 1.7mW at 0.65 V to 1.04GHz and 530mW at 2.0 V. The cache is based on two new circuit techniques; a voltage-adapted timing-generation scheme with plural dummy cells for the wider-voltage-range operation; and use of a lithographically symmetrical cell for lower voltage operation. 收起