摘要 : Reed-Solomon (RS) coders are used for error-control coding in manyapplications such as digital audio, digital TV, software radio, CDplayers, and wireless and satellite communications. Traditionally, RScoders have been implemented ... 展开 Reed-Solomon (RS) coders are used for error-control coding in manyapplications such as digital audio, digital TV, software radio, CDplayers, and wireless and satellite communications. Traditionally, RScoders have been implemented using dedicated hardware. This paperconsiders software-based implementation of RS codecs. Ahardware-software codesign approach is used to design the finite fielddatapath in a domain-specific digital signal processor (DSP) withlow-energy RS codecs application in mind. These datapaths are designedto accommodate programmability with respect to the primitive polynomialas well as the field degree m. A novel heterogeneous digit-serialapproach is proposed, where the heterogeneity corresponds to the use ofdifferent digit sizes in the multiply-accumulate (MAC) and degreereduction (DEGRED) subarrays. The salient feature of this digit-serialapproach is that only the digit cells are implemented in hardware andthe finite field multiplications are performed digit-serially insoftware by dynamically scheduling the internal digit-level operations.Efficient scheduling strategies for digit-serial finite fieldmultiplications are presented and applied to the design of low-energyhigh-performance RS codecs in software. Significant energy andenergy-latency reductions can be achieved using the digit-serialdatapaths, as compared with the traditional approach where a combinedMAC-DEGRED (parallel multiplier) unit is used. It is concluded that fortwo-error-correcting RS(n, k) codes over finite field GF(28),datapath containing a parallel MAC unit (of digit size eight) and aDEGRED unit with digit size two (or four) leads to RS codecs with theleast energy consumption and energy-latency products; with thesedatapath architectures and appropriate digit-serial schedulingstrategies, more than 60% energy reduction and more than one-thirdenergy-latency reduction can be achieved compared with the parallelmultiplication datapath-based approach 收起