摘要 : This paper presents a rate-optimal scheduling for real-time DSP algorithms. By using pipelining and unfolding techniques, the parallel characteristics of recursive DSP algorithms can be exploited. A novel unfolding technique is de... 展开
作者 | Lih-Gwo Jeng Liang-Gee Chen |
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期刊名称 | 《IEEE transactions on very large scale integration (VLSI) systems 》 |
页码/总页数 | P.81-88 / 8 |
语种/中图分类号 | 英语 / TN4 |
关键词 | Digital signal processing Pipelines Optimal scheduling Signal processing algorithms Processor scheduling Scheduling algorithm Digital signal processing chips Flow graphs Delay Telecommunication computing |
DOI | 10.1109/92.273152 |
馆藏号 | IELEP0273 |