摘要: A heterodyne electro-optical phase locked loop (EO-PLL) architecture is proposed that can lock the frequency and phase of semiconductor lasers. An aided acquisition circuit inspired by the combination of RF image rejection receive... 展开 A heterodyne electro-optical phase locked loop (EO-PLL) architecture is proposed that can lock the frequency and phase of semiconductor lasers. An aided acquisition circuit inspired by the combination of RF image rejection receivers and digital PLL architectures is incorporated in the EOPLL to extend the frequency acquisition range to GHz, even in the presence of large optical delays in the EOPLL. An integrated circuit prototype is implemented in a 0.13μm CMOS technology and includes a wide bandwidth transimpedance amplifier and the PLL circuitry. Measurement results for the stand-alone chip and the locking of Vertical Cavity Surface Emitting Lasers (VCSEL) using the implemented chip are reported. 收起