摘要: The successful operation of high-speed charge coupled devices (CCD) requires the generation of large-amplitude properly-phased clock signals. The report describes a circuit designed to provide the necessary clock signals for a CCD... 展开 The successful operation of high-speed charge coupled devices (CCD) requires the generation of large-amplitude properly-phased clock signals. The report describes a circuit designed to provide the necessary clock signals for a CCD capable of operating up to 1000 Ms/s. The CCD requires four clock signals each operating up to 250 MHz and phased 90 exp 0 with respect to each other. An amplitude of approximately 10 volts PP is required for the clock signals. The system described develops the 90 exp 0 phase relationship of the clocks from a single clock operating at twice the desired output frequency and is independent of the clock rate. The bandwidth of the circuits extends from DC to the maximum operating frequency. The prototype developed on this project was able to provide satisfactory performance up to 125 MHz. This deficiency was mainly due to the unavailability of high power transistors needed for the output circuits. These high power transistors were not received early enough in the project to incorporate in the design. (ERA citation 04:027553) 收起