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The COVID-19 pandemic has wreaked havoc on education and resulted in huge changes. These alterations, though, may fade as schools resume. Furthermore, not all of the changes in education are necessarily the reforms we want We sugg...
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The COVID-19 pandemic has wreaked havoc on education and resulted in huge changes. These alterations, though, may fade as schools resume. Furthermore, not all of the changes in education are necessarily the reforms we want We suggest in this study that the pandemic has created an once-in-a-lifetime opportunity for educational reforms that were proposed prior to COVID-19 but never completely achieved. The change is much necessary in the education system. We have been following the same Education system for years and even though change is something that is constant it has not been the same case with the education system. The objective of this paper is to find out the challenges, problems, opportunities and outcome of asynchronous and synchronous learning among university students, specifically in Bangalore. Through this study, the researcher aims to develop a better understanding of how the educational landscape has changed since the introduction of asynchronous and online synchronous modes of learning. Furthermore, the researcher tries to understand the overall impact of the intervention of these innovative techniques in teaching and learning, on both the teachers' and students. From this study, the researcher tries to infer the access to technology that is the digital divide among the students in the education system. Finally, with the aid of this research study, the aim is to have a better understanding of the success rate of asynchronous learning form a student's viewpoint and a professor's viewpoint.
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A low-energy delay element based on a thyristor-like circuit is proposed that is suitable for concatenation in dense arrays in order to delay narrowly spaced burst timing information with accompanying data bits. Handshaking is bui...
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A low-energy delay element based on a thyristor-like circuit is proposed that is suitable for concatenation in dense arrays in order to delay narrowly spaced burst timing information with accompanying data bits. Handshaking is built into the cell to ensure no information is lost. There is no static power dissipation aside from leakage and the energy consumption is not a function of the achieved delay. A design fabricated in a UMC 90 nm CMOS process has delays from 5 ns to 1 $mu{hbox {s}}$ , as tuned through an analog input port, require an energy consumption of 50 fJ/delay event with a supply voltage of 1 V.
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Synchronous VLSI design is approaching a critical point, with clock distribution becoming an increasingly costly and complicated issue and power consumption rapidly emerging as a major concern. Hence, recently, there has been a re...
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Synchronous VLSI design is approaching a critical point, with clock distribution becoming an increasingly costly and complicated issue and power consumption rapidly emerging as a major concern. Hence, recently, there has been a resurgence of interest in asynchronous digital design techniques as they promise to liberate VLSI systems from clock skew problems, offer the potential for low power and high performance and encourage a modular design philosophy which makes incremaental technological migration a much easier task. This activity has revealed a need for modelling and simulation techniques suitable for the asynchronous design style. Contributing to the quest for modelling and simulation techniques suitable for asynchronous design, and motivated by the increasing debate regarding the potential of CSP for this purpose, this paper investigates the suitability of occam, a CSP-based programming language, for the modelling and simulation of complex asynchronous systems. A generic modelling framework is introduced and issues arising from the parallel semantics of CSP/occam when the latter is employed to perform simulation are addressed.
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Many constant time algorithms for various problems have been developed for the reconfigurable mesh (RM) in the past decade. All these algorithms are designed to work with synchronous execution, with no regard for the fact that lar...
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Many constant time algorithms for various problems have been developed for the reconfigurable mesh (RM) in the past decade. All these algorithms are designed to work with synchronous execution, with no regard for the fact that large size RMs will probably be asynchronous. A similar observation about the PRAM model motivated many researchers to develop algorithms and complexity measures for the asynchronous PRAM (APRAM). In this work, we show how to define the asynchronous reconfigurable mesh (ARM) and how to measure the complexity of asynchronous algorithms executed on it. We show that connecting all processors in a row of an n x n ARM (the analog of barrier synchronization in the APRAM model) can be solved with complexity Theta(n log n). Intuitively, this is average work time for solving such a problem. Next, we describe general a technique for simulating T-step synchronous RM algorithms on the ARM with complexity of Theta(T.n (2)log n). Finally, we consider the simulation of the classical synchronous algorithm for counting the number of non-zero bits in an n bits vector using (k < n) x n RM. By carefully optimizing the synchronization to the specific synchronous algorithm being simulated, one can (at least in the case of counting) improve upon the general simulation. [References: 17]
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An asynchronous coding scheme for the inter-neuron pulse communication is proposed. The proposed scheme preserves the timing information of each pulse while small number of wires is required. Here, the firing time and the source o...
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An asynchronous coding scheme for the inter-neuron pulse communication is proposed. The proposed scheme preserves the timing information of each pulse while small number of wires is required. Here, the firing time and the source of an action potential are transmitted separately. The source of the action potential is carried by a packet that consists of a pulse sequence. The pulse sequence uniquely expresses the location of the corresponding neuron in a network. Furthermore, the characteristics such as error-rate and bit-rate of the proposed transmission technique are examined. As a result, it is shown that the proposed scheme is suitable for a large-scale but low bit-rate asynchronous networks.
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An asynchronous coding scheme for the inter-neuron pulse communication is proposed. The proposed scheme preserves the timing information of each pulse while small number of wires is required. Here, the firing time and the source o...
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An asynchronous coding scheme for the inter-neuron pulse communication is proposed. The proposed scheme preserves the timing information of each pulse while small number of wires is required. Here, the firing time and the source of an action potential are transmitted separately. The source of the action potential is carried by a packet that consists of a pulse sequence. The pulse sequence uniquely expresses the location of the corresponding neuron in a network. Furthermore, the characteristics such as error-rate and bit-rate of the proposed transmission technique are examined. As a result, it is shown that the proposed scheme is suitable for a large-scale but low bit-rate asynchronous networks.
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One of the most important keys to efficient design of asynchronous processors is granularity of a delay assumption. With a fine grain delay assumption, an arithmetic unit whose latency can be varied depending on individual input d...
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One of the most important keys to efficient design of asynchronous processors is granularity of a delay assumption. With a fine grain delay assumption, an arithmetic unit whose latency can be varied depending on individual input data is possible. On the contrary, assuming the latency of the critical path for all operands like in synchronous circuits, overhead such as completion signal generation can be minimized. Aiming to give the basis for these design choices, this paper evaluates a latency distribution of various types of arithmetic units by simulating the circuits using trace data of typical benchmark applications. The results show that time overhead of a variable latency property should not exceed 20% for an efficient arithmetic unit.
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This paper introduces the problematics deriving from the adoption of asynchronous update schemes in CA models. Several cellular automata update schemes and a tentative classification of such schemes are introduced and discussed. I...
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This paper introduces the problematics deriving from the adoption of asynchronous update schemes in CA models. Several cellular automata update schemes and a tentative classification of such schemes are introduced and discussed. In order to analyze the effects of the different update schemes, a class of simple CA—called One neighbor binary cellular automata (lnCA)—is then introduced. An overview of the general features of lnCA is described, then the effects of six different updates schemes on all the class of lnCA are described.
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In this paper, we propose statistical schedule length (makespan) analysis for evaluating a schedule and a datapath configuration during asynchronous datapath synthesis. In order to handle the randomness of delay variations mathema...
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In this paper, we propose statistical schedule length (makespan) analysis for evaluating a schedule and a datapath configuration during asynchronous datapath synthesis. In order to handle the randomness of delay variations mathematically, we model the execution time of each operation as a stochastic variable, and take account of three correlations; (C1) correlation between delays on different modules and nets, (C2) structural correlation (re-convergent fanouts), and (C3) correlation induced by resource sharing (depends on resource binding). We present an algorithm to calculate the distribution of total computation time of an application algorithm considering correlations (C1), (C2) and (C3) under given a schedule and resource assignment (binding). By integrating statistical schedule length metric into the cost function to be optimized, we synthesize asynchronous datapaths having optimized statistical performance.
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We explore whether it is possible to use 2D correlation spectrum to characterize intermolecular interactions between two solutes dissolved in the same solution when one substance does not possesses any characteristic peak. We demo...
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We explore whether it is possible to use 2D correlation spectrum to characterize intermolecular interactions between two solutes dissolved in the same solution when one substance does not possesses any characteristic peak. We demonstrate that the interaction can be manifested by characteristic cross peaks in 2D asynchronous correlated spectrum. The above cross peaks reflect the subtle spectral variations on the characteristic peak of another solute under intermolecular interaction. On the other hand, 2D synchronous spectrum is not suitable to characterize intermolecular interaction since the cross peaks contain irremovable interfering parts. The terbium-chloride/benzamide/methanol system is used to demonstrate that this approach is applicable in the real chemical system.
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